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Advanced FPGA Development System

Code: MOT-MIC-0013

Advanced FPGA Development System.
training system is designed based on the latest digital technology in conjunction with EDA experimental teaching material. This training system consists of FPGA chip with higher logic elements and large number of pins. Therefore, students are able to develop, implement and verify design of basic or advanced digital circuit, digital signal processor and CPU/MCU.

This system is equipped with ADC/DAC analog module, keyboard, LCD display, PS2, VGA, UART, SCI interface, LEDs, 8-digit 7-segment displays, DC motor and stepper motor which allow students to handle complex mixed signal design and digital control design.

Basic logic circuit design and application
1. QUARTUS II software installation and operation
2. Basic combinational logic circuit
3. Basic sequential logic circuit
4. Basic arithmetic logic circuit
5. Using megafunction
6. Numerical code conversion circuit

• Advanced logic circuit design and application

1. 48-bit up/down counter with load, clear and enable
2. Infrared coupled transceiver controls 8-digit decimal scanning counter
3. Rotary encoder switch detector
4. 16-segment LEDs digital display decoder
5. 8 x 8 x 2 color dots matrix graphic display control
6. 4 x 4 scanning matrix keypad control
7. 128 x 64 LCD module display control
8. ADC conversion with hexadecimal and decimal display
9. DAC conversion for precise frequency generator
10. Precise function generator controlled by keypad
11. 8 x 8 x 8 color pixels of VGA display control
12. Interfacing with synchronous serial PS/2 keyboard
13. Step motor position controlled by keypad
14. DC motor speed controlled by keypad
15. Using QUARTUS built in real time logic analyzer
16. High speed frequency and period counter
17. Digital clock
18. Music box
19. Electronic piano
20. Digital cipher locker
21. Digital cipher locker with hopping code
22. Bingo machine
23. Electronic dices
24. Traffic light control
25. Serial DAC transmission
26. IIC transmission
27. UART transmission
28. Interfacing with MCU
29. Building NIOS CPU from SOPC developmental system

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